Registered user since Mon 13 Jun 2022
Name:Levente Bajczi
Bio:
I am a PhD student at the Budapest University of Technology and Economics, where I research Computer Science. I primarily do research on the formal verification of multi-threaded software running on weakly consistent multi-core architectures. Furthermore, I am familiar with the toolset of SysML and SysML v2, which I actively use as part of my employment as a research assistant.
Country:Hungary
Affiliation:Budapest University of Technology and Economics
Personal website: http://mit.bme.hu/~bajczi
X (Twitter): https://x.com/bajczilevi
GitHub: https://github.com/leventeBajczi
Research interests:Formal Verification, Weak Memory Models, Systems Engineering
Contributions
Using general profile